PIC16C717T-E/SS【PDF 30/220 页】IC MCU OTP 2KX14 A/D PWM 20SSOP

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2002 Microchip Technology Inc.

DS41120B-page 123

PIC16C717/770/771

12.8

Time-out Sequence

On power-up, the time-out sequence is as follows:

First PWRT time-out is invoked by the POR pulse.

When the PWRT delay expires, the Oscillator Start-up

Timer is activated. The total time-out will vary based on

oscillator configuration and the status of the PWRT.

For example, in RC mode with the PWRT disabled,

there will be no time-out at all. Figure 12-6, Figure 12-

Figure 12-8

and

Figure 12-9

depict

time-out

sequences on power-up.

Since the time-outs occur from the POR pulse, if MCLR

is kept low long enough, the time-outs will expire. Then

bringing MCLR high will begin execution immediately

(Figure 12-8). This is useful for testing purposes or to

synchronize more than one PICmicro microcontroller

operating in parallel.

Table 12-5 shows the RESET conditions for some spe-

cial function registers, while Table 12-6 shows the

RESET conditions for all the registers.

12.9

Power Control/STATUS Register

(PCON)

The Power Control/STATUS Register, PCON, has two

status bits that provide indication of which power-up

type RESET occurred.

Bit0 is Brown-out Reset Status bit, BOR. The BOR bit

is unknown upon a POR. BOR must be set by the user

and checked on subsequent RESETS to see if bit BOR

cleared, indicating a BOR occurred.

Bit1 is POR (Power-on Reset Status bit). It is cleared on

a Power-on Reset and unaffected otherwise. The user

must set this bit following a Power-on Reset.

TABLE 12-3:

TIME-OUT IN VARIOUS SITUATIONS

TABLE 12-4:

STATUS BITS AND THEIR SIGNIFICANCE

TABLE 12-5:

RESET CONDITION FOR SPECIAL REGISTERS

Oscillator Configuration

Power-up

Brown-out

Wake-up from

SLEEP

PWRTE = 0

PWRTE = 1

XT, HS, LP

TPWRT + 1024TOSC

1024TOSC

TPWRT + 1024TOSC

1024TOSC

EC, ER, INTRC

TPWRT

—

TPWRT

—

POR

BOR

Power-on Reset

Illegal, TO is set on POR

Illegal, PD is set on POR

Brown-out Reset

WDT Reset

WDT Wake-up

MCLR Reset during normal operation

MCLR Reset during SLEEP or interrupt wake-up from SLEEP

Condition

Program

Counter

STATUS

Register

PCON

Register

Power-on Reset

000h

0001 1xxx

---- 1-0x

MCLR Reset during normal operation

000h

000u uuuu

---- 1-uu

MCLR Reset during SLEEP

000h

0001 0uuu

---- 1-uu

WDT Reset

000h

0000 1uuu

---- 1-uu

WDT Wake-up

PC + 1

uuu0 0uuu

---- u-uu

Brown-out Reset

000h

0001 1uuu

---- 1-u0

Interrupt wake-up from SLEEP, GIE = 0

PC + 1

uuu1 0uuu

---- u-uu

Interrupt wake-up from SLEEP, GIE = 1

0004h

uuu1 0uuu

---- u-uu

Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.

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